[PATCH] D114230: [AMDGPU] Use new opcode for indexed vgpr reads

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/VOP1Instructions.td:870-871
                                         getVOPSrc0ForVT<i32>.ret:$src0)> {
   let VOP1 = 1;
   let SubtargetPredicate = isGFX8GFX9;
 }
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Probably should be a separate patch, but should these have implicit m0 reads (and maybe hasSideEffects = 1?)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114230/new/

https://reviews.llvm.org/D114230