[PATCH] D114230: [AMDGPU] Use new opcode for indexed vgpr reads

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM, I've meant to do this before



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Comment at: llvm/lib/Target/AMDGPU/VOP1Instructions.td:879-880
+  (ins getVOPSrc0ForVT<i32>.ret:$src0)>,
+  PseudoInstExpansion<(V_MOV_B32_e32_vi getVALUDstForVT<i32>.ret:$vdst,
+                                        getVOPSrc0ForVT<i32>.ret:$src0)> {
+  let VOP1 = 1;
----------------
It's a weird accident we can actually use PseudoInstExpansion here since we only need to deal with the one encoding


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114230/new/

https://reviews.llvm.org/D114230