[PATCH] D113970: [SelectionDAG] Add pattern to haveNoCommonBitsSet.

[Omer Aviram via Phabricator via llvm-commits]

OmerAviram updated this revision to Diff 387902.
OmerAviram added a comment.

Added tests for the different pattern permutations as a separate patch (https://reviews.llvm.org/D114078) and rebased on it.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113970/new/

https://reviews.llvm.org/D113970

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/X86/or-lea.ll


Index: llvm/test/CodeGen/X86/or-lea.ll
===================================================================
--- llvm/test/CodeGen/X86/or-lea.ll
+++ llvm/test/CodeGen/X86/or-lea.ll
@@ -136,12 +136,12 @@
 define i16 @or_and_and_1(i16 %x, i16 %y, i16 %z) {
 ; CHECK-LABEL: or_and_and_1:
 ; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    # kill: def $edx killed $edx def $rdx
 ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
 ; CHECK-NEXT:    andl %esi, %edx
 ; CHECK-NEXT:    notl %esi
 ; CHECK-NEXT:    andl %edi, %esi
-; CHECK-NEXT:    orl %edx, %esi
-; CHECK-NEXT:    leal 1(%rsi), %eax
+; CHECK-NEXT:    leal 1(%rdx,%rsi), %eax
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
 entry:
@@ -156,12 +156,12 @@
 define i16 @or_and_and_2(i16 %x, i16 %y, i16 %z) {
 ; CHECK-LABEL: or_and_and_2:
 ; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    # kill: def $edx killed $edx def $rdx
 ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
 ; CHECK-NEXT:    andl %esi, %edx
 ; CHECK-NEXT:    notl %esi
 ; CHECK-NEXT:    andl %edi, %esi
-; CHECK-NEXT:    orl %edx, %esi
-; CHECK-NEXT:    leal 1(%rsi), %eax
+; CHECK-NEXT:    leal 1(%rdx,%rsi), %eax
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
 entry:
@@ -177,11 +177,11 @@
 ; CHECK-LABEL: or_and_and_3:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
+; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
 ; CHECK-NEXT:    andl %esi, %edi
 ; CHECK-NEXT:    notl %esi
 ; CHECK-NEXT:    andl %edx, %esi
-; CHECK-NEXT:    orl %edi, %esi
-; CHECK-NEXT:    leal 1(%rsi), %eax
+; CHECK-NEXT:    leal 1(%rsi,%rdi), %eax
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
 entry:
@@ -197,11 +197,11 @@
 ; CHECK-LABEL: or_and_and_4:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
+; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
 ; CHECK-NEXT:    andl %esi, %edi
 ; CHECK-NEXT:    notl %esi
 ; CHECK-NEXT:    andl %edx, %esi
-; CHECK-NEXT:    orl %edi, %esi
-; CHECK-NEXT:    leal 1(%rsi), %eax
+; CHECK-NEXT:    leal 1(%rsi,%rdi), %eax
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
 entry:
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4540,10 +4540,25 @@
 }
 
 // FIXME: unify with llvm::haveNoCommonBitsSet.
-// FIXME: could also handle masked merge pattern (X & ~M) op (Y & M)
 bool SelectionDAG::haveNoCommonBitsSet(SDValue A, SDValue B) const {
   assert(A.getValueType() == B.getValueType() &&
          "Values must have the same type");
+  // Match masked merge pattern (X & ~M) op (Y & M)
+  if (A->getOpcode() == ISD::AND && B->getOpcode() == ISD::AND) {
+    auto MatchNoCommonBitsPattern = [&](SDValue A, SDValue B) {
+      if (isBitwiseNot(A, true)) {
+        SDValue NotOperand = A->getOperand(0);
+        return (NotOperand == B->getOperand(0) ||
+                NotOperand == B->getOperand(1));
+      }
+      return false;
+    };
+    if (MatchNoCommonBitsPattern(A->getOperand(0), B) ||
+        MatchNoCommonBitsPattern(A->getOperand(1), B) ||
+        MatchNoCommonBitsPattern(B->getOperand(0), A) ||
+        MatchNoCommonBitsPattern(B->getOperand(1), A))
+      return true;
+  }
   return KnownBits::haveNoCommonBitsSet(computeKnownBits(A),
                                         computeKnownBits(B));
 }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D113970.387902.patch
Type: text/x-patch
Size: 3587 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211117/9ab8fb9a/attachment.bin>