[PATCH] D113967: [RISCV] Reverse the order of loading/storing callee-saved registers.

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 16 12:23:39 PST 2021

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jrtc27 added a comment.

What's the benefit of reversing the spills? Seems unnecessary to me. GCC will emit spills and loads in the same order for RISC-V.


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  https://reviews.llvm.org/D113967/new/

https://reviews.llvm.org/D113967

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