[PATCH] D113915: X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 16 bit when have AVX512BW

[Roman Lebedev via Phabricator via llvm-commits]

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Here we get pretty lucky. AVX512F does not provide any instructions
to convert between a `k` vector mask and a vector,
but AVX512BW adds `{k}<->nX{i8,i16}`conversions,
and just as it happens, with AVX512BW we have a i16 shuffle.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D113915

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/shuffle-replication-i1.ll

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