[PATCH] D113845: [X86] getAVX512Node() - find constant broadcasts to encourage load-folding
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 15 04:25:29 PST 2021
pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.
LGTM.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:6423
+ HasAnyUndefs, OpEltSizeInBits) &&
+ !HasAnyUndefs && SplatValue.getBitWidth() == OpEltSizeInBits) {
+ return DAG.getConstant(SplatValue, DL, DstVT);
----------------
No need parentheses?
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:46230
+ unsigned EltSizeInBits = VT.getScalarSizeInBits();
+ if (!VT.isVector() || (EltSizeInBits % 8) != 0)
return SDValue();
----------------
RKSimon wrote:
> RKSimon wrote:
> > pengfei wrote:
> > > Can we handle no-pow-2 type?
> > If we did see those cases I'd expect the ternlog code would already have crashed, but I'll add it to be sure.
> Confirmed - canonicalizeBitSelect get called only after legalize ops, so the types will be legal and pow2
So we can assert `(EltSizeInBits % 8) == 0`?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D113845/new/
https://reviews.llvm.org/D113845
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