[llvm] 609ccbb - [PowerPC] Use SDNode::uses (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 13 08:34:33 PST 2021
Author: Kazu Hirata
Date: 2021-11-13T08:34:22-08:00
New Revision: 609ccbb2407ff346ffcedd7b8d7937fb98e11a01
URL: https://github.com/llvm/llvm-project/commit/609ccbb2407ff346ffcedd7b8d7937fb98e11a01
DIFF: https://github.com/llvm/llvm-project/commit/609ccbb2407ff346ffcedd7b8d7937fb98e11a01.diff
LOG: [PowerPC] Use SDNode::uses (NFC)
Added:
Modified:
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index ef9cb454dd87c..7a6276b937686 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -6276,9 +6276,7 @@ void PPCDAGToDAGISel::PostprocessISelDAG() {
// be folded with the isel so that we don't need to materialize a register
// containing zero.
bool PPCDAGToDAGISel::AllUsersSelectZero(SDNode *N) {
- for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
- UI != UE; ++UI) {
- SDNode *User = *UI;
+ for (const SDNode *User : N->uses()) {
if (!User->isMachineOpcode())
return false;
if (User->getMachineOpcode() != PPC::SELECT_I4 &&
@@ -6312,18 +6310,14 @@ bool PPCDAGToDAGISel::AllUsersSelectZero(SDNode *N) {
void PPCDAGToDAGISel::SwapAllSelectUsers(SDNode *N) {
SmallVector<SDNode *, 4> ToReplace;
- for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
- UI != UE; ++UI) {
- SDNode *User = *UI;
+ for (SDNode *User : N->uses()) {
assert((User->getMachineOpcode() == PPC::SELECT_I4 ||
User->getMachineOpcode() == PPC::SELECT_I8) &&
"Must have all select users");
ToReplace.push_back(User);
}
- for (SmallVector<SDNode *, 4>::iterator UI = ToReplace.begin(),
- UE = ToReplace.end(); UI != UE; ++UI) {
- SDNode *User = *UI;
+ for (SDNode *User : ToReplace) {
SDNode *ResNode =
CurDAG->getMachineNode(User->getMachineOpcode(), SDLoc(User),
User->getValueType(0), User->getOperand(0),
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index a7b2fecf2eae1..7c9f378528b36 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2570,9 +2570,8 @@ static bool provablyDisjointOr(SelectionDAG &DAG, const SDValue &N) {
bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base,
SDValue &Index,
SelectionDAG &DAG) const {
- for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end();
- UI != E; ++UI) {
- if (MemSDNode *Memop = dyn_cast<MemSDNode>(*UI)) {
+ for (SDNode *U : N->uses()) {
+ if (MemSDNode *Memop = dyn_cast<MemSDNode>(U)) {
if (Memop->getMemoryVT() == MVT::f64) {
Base = N.getOperand(0);
Index = N.getOperand(1);
@@ -13205,12 +13204,12 @@ static bool findConsecutiveLoad(LoadSDNode *LD, SelectionDAG &DAG) {
if (isConsecutiveLS(ChainLD, LD, VT.getStoreSize(), 1, DAG))
return true;
- for (SDNode::use_iterator UI = LoadRoot->use_begin(),
- UE = LoadRoot->use_end(); UI != UE; ++UI)
- if (((isa<MemSDNode>(*UI) &&
- cast<MemSDNode>(*UI)->getChain().getNode() == LoadRoot) ||
- UI->getOpcode() == ISD::TokenFactor) && !Visited.count(*UI))
- Queue.push_back(*UI);
+ for (SDNode *U : LoadRoot->uses())
+ if (((isa<MemSDNode>(U) &&
+ cast<MemSDNode>(U)->getChain().getNode() == LoadRoot) ||
+ U->getOpcode() == ISD::TokenFactor) &&
+ !Visited.count(U))
+ Queue.push_back(U);
}
}
@@ -13267,11 +13266,9 @@ SDValue PPCTargetLowering::ConvertSETCCToSubtract(SDNode *N,
// If all users of SETCC extend its value to a legal integer type
// then we replace SETCC with a subtraction
- for (SDNode::use_iterator UI = N->use_begin(),
- UE = N->use_end(); UI != UE; ++UI) {
- if (UI->getOpcode() != ISD::ZERO_EXTEND)
+ for (const SDNode *U : N->uses())
+ if (U->getOpcode() != ISD::ZERO_EXTEND)
return SDValue();
- }
ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
auto OpSize = N->getOperand(0).getValueSizeInBits();
@@ -13448,10 +13445,7 @@ SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
if (isa<ConstantSDNode>(Inputs[i]))
continue;
- for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(),
- UE = Inputs[i].getNode()->use_end();
- UI != UE; ++UI) {
- SDNode *User = *UI;
+ for (const SDNode *User : Inputs[i].getNode()->uses()) {
if (User != N && !Visited.count(User))
return SDValue();
@@ -13472,10 +13466,7 @@ SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
}
for (unsigned i = 0, ie = PromOps.size(); i != ie; ++i) {
- for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(),
- UE = PromOps[i].getNode()->use_end();
- UI != UE; ++UI) {
- SDNode *User = *UI;
+ for (const SDNode *User : PromOps[i].getNode()->uses()) {
if (User != N && !Visited.count(User))
return SDValue();
@@ -13660,10 +13651,7 @@ SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
if (isa<ConstantSDNode>(Inputs[i]))
continue;
- for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(),
- UE = Inputs[i].getNode()->use_end();
- UI != UE; ++UI) {
- SDNode *User = *UI;
+ for (SDNode *User : Inputs[i].getNode()->uses()) {
if (User != N && !Visited.count(User))
return SDValue();
@@ -13685,10 +13673,7 @@ SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
}
for (unsigned i = 0, ie = PromOps.size(); i != ie; ++i) {
- for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(),
- UE = PromOps[i].getNode()->use_end();
- UI != UE; ++UI) {
- SDNode *User = *UI;
+ for (SDNode *User : PromOps[i].getNode()->uses()) {
if (User != N && !Visited.count(User))
return SDValue();
@@ -15383,36 +15368,33 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
APInt::getAllOnes(Bits /* alignment */)
.zext(Add.getScalarValueSizeInBits()))) {
SDNode *BasePtr = Add->getOperand(0).getNode();
- for (SDNode::use_iterator UI = BasePtr->use_begin(),
- UE = BasePtr->use_end();
- UI != UE; ++UI) {
- if (UI->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
- cast<ConstantSDNode>(UI->getOperand(0))->getZExtValue() ==
- IID) {
+ for (SDNode *U : BasePtr->uses()) {
+ if (U->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
+ cast<ConstantSDNode>(U->getOperand(0))->getZExtValue() == IID) {
// We've found another LVSL/LVSR, and this address is an aligned
// multiple of that one. The results will be the same, so use the
// one we've just found instead.
- return SDValue(*UI, 0);
+ return SDValue(U, 0);
}
}
}
if (isa<ConstantSDNode>(Add->getOperand(1))) {
SDNode *BasePtr = Add->getOperand(0).getNode();
- for (SDNode::use_iterator UI = BasePtr->use_begin(),
- UE = BasePtr->use_end(); UI != UE; ++UI) {
- if (UI->getOpcode() == ISD::ADD &&
- isa<ConstantSDNode>(UI->getOperand(1)) &&
+ for (SDNode *U : BasePtr->uses()) {
+ if (U->getOpcode() == ISD::ADD &&
+ isa<ConstantSDNode>(U->getOperand(1)) &&
(cast<ConstantSDNode>(Add->getOperand(1))->getZExtValue() -
- cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) %
- (1ULL << Bits) == 0) {
- SDNode *OtherAdd = *UI;
- for (SDNode::use_iterator VI = OtherAdd->use_begin(),
- VE = OtherAdd->use_end(); VI != VE; ++VI) {
- if (VI->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
- cast<ConstantSDNode>(VI->getOperand(0))->getZExtValue() == IID) {
- return SDValue(*VI, 0);
+ cast<ConstantSDNode>(U->getOperand(1))->getZExtValue()) %
+ (1ULL << Bits) ==
+ 0) {
+ SDNode *OtherAdd = U;
+ for (SDNode *V : OtherAdd->uses()) {
+ if (V->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
+ cast<ConstantSDNode>(V->getOperand(0))->getZExtValue() ==
+ IID) {
+ return SDValue(V, 0);
}
}
}
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