[PATCH] D113475: [llvm-tblgen][RISCV] Make llvm-tblgen RISCVCompressInstEmitter to be common infra across different targets

Zixuan Wu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 11 19:04:30 PST 2021


zixuan-wu updated this revision to Diff 386714.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113475/new/

https://reviews.llvm.org/D113475

Files:
  llvm/include/llvm/Target/Target.td
  llvm/lib/Target/RISCV/RISCVInstrInfoC.td
  llvm/test/TableGen/AsmPredicateCombiningRISCV.td
  llvm/utils/TableGen/CMakeLists.txt
  llvm/utils/TableGen/CompressInstEmitter.cpp
  llvm/utils/TableGen/RISCVCompressInstEmitter.cpp

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