[PATCH] D113655: [IR] Allow all integer types for stepvector intrinsic

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-stepvector.ll:50
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    index z0.d, #0, #1
+; CHECK-NEXT:    ret
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Should the code that promotes this value also mask the low 3 bits, thus `and`ing this value with `splat(7)` ?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113655/new/

https://reviews.llvm.org/D113655