[PATCH] D113649: [RISCV] Teach VSETVLI insertion to handle mask instruction which has avl from a PHI node.

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan abandoned this revision.
jacquesguan added a comment.

In D113649#3123821 <https://reviews.llvm.org/D113649#3123821>, @craig.topper wrote:

> I already posted a patch for this https://reviews.llvm.org/D113204

OK, I will close this.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113649/new/

https://reviews.llvm.org/D113649