[PATCH] D113035: [InstCombine] enhance vector bitwise select matching

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp:2372
+    Type *SelTy = A->getType();
+    if (auto *VecTy = dyn_cast<FixedVectorType>(Cond->getType())) {
+      unsigned Elts = VecTy->getNumElements();
----------------
spatel wrote:
> lebedev.ri wrote:
> > What happens for scalable vectors? I'm not seeing any check against that.
> I couldn't come up with a way to get in here with a scalable vector because of the 'not' instruction requirement. But let me know if you see a way to do that (ping @dmgreen too).
> 
> I can add an assert for scalable vector type if I got that right.
Do you mean a Not with scalable vectors? Or some more complicated combination of instructions?

There doesn't look to be a way to generate the SVE NOT instruction at least, from the tests we have. I think it would need to be from a `xor x, (shuffle (insert poison, -1, 0), zeroinit)` if there was one, but I've not tried to see if m_Not detects that or not.
Like here for a predicate vector, the same thing would apply for larger vector types:
https://github.com/llvm/llvm-project/blob/32a4a883f647c314a42ebd572e36aaf60ffe9889/llvm/test/Transforms/InstCombine/select.ll#L102

If that doesn't work already, an assert sounds useful in case someone makes that work in the future.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113035/new/

https://reviews.llvm.org/D113035