[PATCH] D113178: [PowerPC] use right register class for input operand of XXPERMDIs
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 5 18:34:35 PDT 2021
shchenz marked an inline comment as done.
shchenz added a comment.
In D113178#3111575 <https://reviews.llvm.org/D113178#3111575>, @jsji wrote:
>> Of course the distinction is purely aesthetic, but I think it helps readability.
>
> Yes, this help readability when there are large number of instructions between lfiwax and xxspltd.
> But this does introduce confusion about register classes -- it is suspicious that `xxspltd` operate on `f0` instead of `vs0`.
I have the same feeling about the `f0` instead of `vs0`. In Power ISA, instruction format for `xxpermdi` is like: `xxpermdi XT,XA,XB,DM`. I think `XT`, `XA`, `XB` are all for VSR register index even when `XA` == `XB`.
> I am OK with leaving it as it is, but I think we should at least add some comments in `XXPERMDIs` to clarify this register class change.
OK, then I will abandon this patch, and commit an NFC patch to explain the different register classes for `XXPERMDIs` and `XXPERMDI`
Thanks for your review @nemanjai @jsji
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https://reviews.llvm.org/D113178
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