[PATCH] D111117: [RISCV] Optimize (add (shl x, c0), c1)

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

I'm seeing some code size regressions on this patch - specifically, cases where a reg-reg add is replaced with an addi -256 (which isn't compressible). e.g. 20050121-1.c from the GCC torture suite (-O1, rv32imafdc).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111117/new/

https://reviews.llvm.org/D111117