[PATCH] D104236: [AArch64] Add a TableGen pattern to generate uaddlv from uaddlp and addv

JinGu Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 5 03:51:19 PDT 2021

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jaykang10 added a comment.

@LemonBoy I am sorry for bug... It was my mistake... As @efriedma mentioned, it should be `v8i18` rather than `v4i16`. Let me update it.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D104236/new/

https://reviews.llvm.org/D104236

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