[PATCH] D104236: [AArch64] Add a TableGen pattern to generate uaddlv from uaddlp and addv

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

It looks like there's a typo in the patch.  The pattern for v8i8 produces UADDLVv4i16v; I think it's supposed to be UADDLVv8i8v.  If that's fixed, for the testcase uaddlv4h_from_v8i8 in this patch, we should produce `uaddlv h0, v0.8b`.  The current `uaddlv s0, v0.4h` is pretty clearly wrong.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D104236/new/

https://reviews.llvm.org/D104236