[PATCH] D112692: [RISCV] Generate pseudo instruction li

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

Yeah, I think this is is ok, we just have to be a bit careful to ensure we don't prefer fancy bitmanip things for PseudoLI when a plain ADDI works.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D112692/new/

https://reviews.llvm.org/D112692