[PATCH] D112466: [NVPTX] Annotate LDG/LDU instructions as mayLoad

[Johannes Doerfert via Phabricator via llvm-commits]

jdoerfert added a comment.

Loads from constant memory that is known dereferenceable are not modeled as loads/reads in the IR, e.g., we derive readnone in their presence.
At least if you have "constant mem" TBAA annotations or some other encodings that inform the analyses about the constness of the memory.
That said, if the verifier complains we need to teach the verifier or avoid this. I am inclined to suggest the former if there is no reason not to.


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https://reviews.llvm.org/D112466