[PATCH] D111638: [AArch64][SVE] Combine predicated FMUL/FADD into FMA

Matt Devereau via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 25 08:40:16 PDT 2021


MattDevereau updated this revision to Diff 382013.
MattDevereau added a comment.

Remove global flag condition checking for this pass


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111638/new/

https://reviews.llvm.org/D111638

Files:
  llvm/include/llvm/IR/Operator.h
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fmla.ll

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