[PATCH] D111530: [TargetLowering] Optimize expanded SRL/SHL fed into SETCC ne/eq 0

Mon Oct 25 01:59:48 PDT 2021

fzhinkin added a comment.

In D111530#3080743 <https://reviews.llvm.org/D111530#3080743>, @fzhinkin wrote:

> In D111530#3080538 <https://reviews.llvm.org/D111530#3080538>, @RKSimon wrote:
>
>> In D111530#3076353 <https://reviews.llvm.org/D111530#3076353>, @fzhinkin wrote:
>>
>>> In D111530#3074772 <https://reviews.llvm.org/D111530#3074772>, @RKSimon wrote:
>>>
>>>> please can you pre-commit these new tests to trunk with current codegen and then rebase to show the diff?
>>>
>>> I don't have a permission to commit changes, so I'll appreciate if you can help me with it. Here's the patch adding new tests with checks generated for current trunk: F19740759: 50197_precommit_tests.patch <https://reviews.llvm.org/F19740759>
>>
>> Done (sorry for the delay) - please can you rebase?
>
> Thank you! Rebase done.
>
> Also, thanks for adding i686 to X86's test, it revealed that my optimization does not work when we're legalizing i128 to i32. I'll check if that case could be easily supported.

Handling of trees generated during legalization of i128/i256/etc to i32 is relatively simple, but in case of i686 some of these expressions are folded into funnel shifts before `SimplifySetCC` is applied to setcc.
I see two options here (but I'm far from being an expert, so correct me if I'm wrong and there are simpler alternatives):

1. support various instructions (funnel shifts, rotations, bit/byte swaps) in `TargetLowering::optimizeSetCCOfExpandedShift` in addition to SHL/SRL;
2. support only SHL/SRL in `TargetLowering::optimizeSetCCOfExpandedShift` and apply it in `DAGTypeLegalizer::IntegerExpandSetCCOperands` right after setcc's operands expansion.

Personally I'm leaning towards second option as it should be less fragile and easier to maintain.

Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D111530