[PATCH] D110865: X86InstrInfo: Optimize more combinations of SUB+CMP

[Matthias Braun via Phabricator via llvm-commits]

MatzeB updated this revision to Diff 381811.
MatzeB marked an inline comment as done.
MatzeB added a comment.

Document new SrcReg2.isPhysical() test. (The test fixes a pre-existing bug though likely benign since nothing should actually use physical registers on CMP/SUB/TEST instructions that early in the codegen pipeline)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110865/new/

https://reviews.llvm.org/D110865

Files:
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/lib/Target/X86/X86InstrInfo.h
  llvm/test/CodeGen/X86/2007-02-16-BranchFold.ll
  llvm/test/CodeGen/X86/optimize-compare.mir
  llvm/test/CodeGen/X86/postalloc-coalescing.ll

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