[PATCH] D112373: [AMDGPU] Use max waves for scheduler's initial occupancy target
Austin Kerbow via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 23 17:17:05 PDT 2021
kerbowa created this revision.
kerbowa added reviewers: rampitec, arsenm, vangthao, vpykhtin, foad.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl, qcolombet.
kerbowa requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
The scheduler should set critical/excess register usage thresholds that
are guided by the maximum possible occupancy for the function. This
change is focused on setting proper lower bounds on register usage which
we would typically only see when a specific number of maximum waves is
requested with the "waves-per-eu" attribute, or by setting
"amdgpu-num-vgpr|sgpr" directly. This was broken previously. I have a
follow-on patch that will address issues with the scheduler not
targeting correct upper bounds on register usage which is typical with
launch bounds and min "waves-per-eu".
Changes by this patch:
Set the initial critical register usage thresholds to minimum values
that are determined by the maximum possible occupancy for the function,
or the number of allocatable registers, whichever is lower.
Avoid unisgned overflow if register limits are lower than the register
tracking "ErrorMargin", I.e. when using stress-regalloc=2.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D112373
Files:
llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
llvm/test/CodeGen/AMDGPU/load-global-i16.ll
llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll
llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll
llvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
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