[PATCH] D111530: [TargetLowering] Optimize expanded SRL/SHL fed into SETCC ne/eq 0

Fri Oct 22 08:17:30 PDT 2021

fzhinkin added a comment.

In D111530#3080538 <https://reviews.llvm.org/D111530#3080538>, @RKSimon wrote:

> In D111530#3076353 <https://reviews.llvm.org/D111530#3076353>, @fzhinkin wrote:
>
>> In D111530#3074772 <https://reviews.llvm.org/D111530#3074772>, @RKSimon wrote:
>>
>>> please can you pre-commit these new tests to trunk with current codegen and then rebase to show the diff?
>>
>> I don't have a permission to commit changes, so I'll appreciate if you can help me with it. Here's the patch adding new tests with checks generated for current trunk: F19740759: 50197_precommit_tests.patch <https://reviews.llvm.org/F19740759>
>
> Done (sorry for the delay) - please can you rebase?

Thank you! Rebase done.

Also, thanks for adding i686 to X86's test, it revealed that my optimization does not work when we're legalizing i128 to i32. I'll check if that case could be easily supported.

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D111530/new/

https://reviews.llvm.org/D111530