[PATCH] D108750: [PowerPC] common chains to reuse offsets to reduce register pressure

[Jinsong Ji via Phabricator via llvm-commits]

jsji accepted this revision as: jsji.
jsji added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks for working on this.



================
Comment at: llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp:154
+// there would be 4 buckets at most on P9(IssueWidth is 8).
+static cl::opt<unsigned> MaxVarsChainCommon("ppc-chaincommon-max-vars",
+                                 cl::Hidden, cl::init(4),
----------------
Address clang-format warning please.


================
Comment at: llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp:559
+
+  SCEVExpander SCEVE(*SE, Header->getModule()->getDataLayout(), "loopprepare");
+
----------------
Can we name this different from line 1019? both are "loopprepare"?


================
Comment at: llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp:830
   for (auto &B : Buckets) {
+    if (cast<SCEVAddRecExpr>(B.BaseSCEV)->getStepRecurrence(*SE) !=
+        cast<SCEVAddRecExpr>(LSCEV)->getStepRecurrence(*SE))
----------------
This is a new check for updateform/d/dqform, make sure it is intended.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108750/new/

https://reviews.llvm.org/D108750