[PATCH] D110841: [AArch64] Remove redundant ORRWrs which is generated by zero-extend

Tue Oct 19 00:48:01 PDT 2021

jaykang10 added a comment.

In D110841#3071072 <https://reviews.llvm.org/D110841#3071072>, @dmgreen wrote:

> Do we need to add an extra TS bit, or can we just use GENERIC_OP_END?
>
> As far as I understand the opcodes are always in the order: [TargetOpcodes, G_ opcodes, A64 Pseudos, A64 instructions]. Do we need to rule out A64 pseudos? If so can we check isPseudo().

Ah, you are right!!! Let me update code. Thanks @dmgreen

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110841/new/

https://reviews.llvm.org/D110841