[PATCH] D110841: [AArch64] Remove redundant ORRWrs which is generated by zero-extend

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Do we need to add an extra TS bit, or can we just use GENERIC_OP_END?

As far as I understand the opcodes are always in the order: [TargetOpcodes, G_ opcodes, A64 Pseudos, A64 instructions]. Do we need to rule out A64 pseudos? If so can we check isPseudo().


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110841/new/

https://reviews.llvm.org/D110841