[PATCH] D111904: [RISCV] Lower fixed vector CTLZ_ZERO_UNDEF by converting to FP and extracting the exponent.

[Craig Topper via Phabricator via llvm-commits]

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If we have a large enough floating point type that can exactly
represent the integer value, we can convert the value to FP and
use the exponent to calculate the leading zeros.

The exponent will contain log2 of the value plus the exponent bias.
We can then remove the bias and convert from log2 to leading zeros.

This doesn't work for zero since the exponent of zero is zero so we
can only do this for CTLZ_ZERO_UNDEF. If we need CTLZ we can use
a vmseq and a vmerge to handle it.

We need to be careful to make sure the floating point type is legal.
If it isn't we'll split the value until it is. This assumes we have
at least an LMUL=1 FP type and can use fractional LMUL for the integer
type which should be true based on how we've set up the types.

I think there's some weird artifacts in here from the concat_vectors
handling and fixed vector undef being lowered to all zeros. I'll look
at that as a follow up.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111904

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll