[PATCH] D111386: RFC: [Hexagon] Mark target as not "machine verifier clean"

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

In D111386#3050148 <https://reviews.llvm.org/D111386#3050148>, @foad wrote:

> Is it feasible to fix the packetizer?



In D111386#3051208 <https://reviews.llvm.org/D111386#3051208>, @kparzysz wrote:

> There is nothing to fix in the packetizer.  On Hexagon the order of instructions inside of packets generally doesn't matter (with a few exceptions).  The verifier simply doesn't handle that, and that's why it's disabled.

OK, maybe "fix" was the wrong word, but I still don't think it's good that the packetizer and the verifier disagree about the rules for valid MIR. Maybe the packetizer could set some MachineFunction property analogous to IsSSA, to tell the verifier that it should enforce different rules.


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