[PATCH] D111856: [AArch64][GlobalISel] combine (and (or x, c1), c2) => (and x, c2) iff c1 & c2 == 0

[Jon Roelofs via Phabricator via llvm-commits]

jroelofs created this revision.
jroelofs added reviewers: aemerson, paquette.
Herald added subscribers: hiraditya, kristof.beyls, rovka.
jroelofs requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

rdar://83597585


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D111856

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
  llvm/include/llvm/Target/GlobalISel/Combine.td
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/combine-and-or-disjoint-mask.mir

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