[PATCH] D109144: [SPIR-V] Add SPIR-V triple architecture and clang target info

[Henry Linjamäki via Phabricator via llvm-commits]

linjamaki added a comment.

> Can you explain what does this mean

It was trying to clarify a potential misunderstanding of how programs are compiled when HIPSPV is targeted:  For HIPSPV, the SPIR-V code generation is done by the clang driver. When we compile HIP programs for HIPCL or the HIPLZ runtime, we issue a single clang command such as this:

  clang++ --offload=spirv64 foo.hip -l<hip-runtime> -o foo

With this, the clang driver compiles the device side code to a SPIR-V binary and then compiles host side code, and embeds the SPIR-V binary to the host (fat) binary.

> ? In the tests I can see the following `--offload=spirv64` which does feel like it is specified explicitly that the target is SPIR-V...

For HIPSPV the `--offload` option is used to specify the device code target but the end result is a host binary (e.g. x86_64) with device code (SPIR-V binary) embedded in it. We need a way to specify the device code target to be other than the currently fixed `amdgcn-amd-amdhsa` and using the `--offload` switch is a solution we are suggesting here.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109144/new/

https://reviews.llvm.org/D109144