[PATCH] D111538: [X86] Prefer VEX encoding in X86 assembler.

Pengfei Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 13 08:15:29 PDT 2021


pengfei added inline comments.


================
Comment at: llvm/utils/TableGen/AsmMatcherEmitter.cpp:624
     for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
       if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
         return true;
----------------
pengfei wrote:
> I have a question here. AVX512 instructions have larger register class, e.g. VR128X vs. VR128. Why doesn't (Could) the code work for them?
Oh, it seems they are all the same since only GPRs and memory.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111538/new/

https://reviews.llvm.org/D111538



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