[PATCH] D111304: [RISCV] Reorder the vector register allocation order.

Roger Ferrer Ibanez via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 12 02:23:47 PDT 2021


rogfer01 added a comment.

No objection with this, I guess it is for consistency with GPRs, right?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D111304/new/

https://reviews.llvm.org/D111304



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