[PATCH] D108988: [ARM] Simplify address calculation for NEON load/store
Andrew Savonichev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 11 04:12:41 PDT 2021
asavonic updated this revision to Diff 378619.
asavonic edited the summary of this revision.
asavonic added a comment.
Herald added subscribers: steven.zhang, mgrang.
> is there a way to make this work without disabling the generic folds? Perhaps by adding new folds for fixing postinc patterns, and getting "add-like-ors" to behave like adds in more places?
Done. Everything is moved to DAGCombine now, so the new pass is not required.
This allows to catch more cases, and not require any changes around
ADD-to-OR tranformation.
Code from CombineBaseUpdate is moved to TryCombineBaseUpdate without
major changes, but now we look for more candidates (pointer updates)
and try to pick the best one.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D108988/new/
https://reviews.llvm.org/D108988
Files:
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/ARM/alloc-no-stack-realign.ll
llvm/test/CodeGen/ARM/arm-post-indexing-opt.ll
llvm/test/CodeGen/ARM/fp16-vector-argument.ll
llvm/test/CodeGen/ARM/large-vector.ll
llvm/test/CodeGen/ARM/memcpy-inline.ll
llvm/test/CodeGen/ARM/memset-align.ll
llvm/test/CodeGen/ARM/misched-fusion-aes.ll
llvm/test/CodeGen/ARM/vector-load.ll
llvm/test/CodeGen/ARM/vext.ll
llvm/test/CodeGen/ARM/vselect_imax.ll
llvm/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll
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