[llvm] adf7043 - [AMDGPU] Only remove branches in SIInstrInfo::removeBranch

[Carl Ritson via llvm-commits]

Author: Carl Ritson
Date: 2021-10-06T10:34:26+09:00
New Revision: adf7043a9fbafc35add555b8542a198c1c678cb7

URL: https://github.com/llvm/llvm-project/commit/adf7043a9fbafc35add555b8542a198c1c678cb7
DIFF: https://github.com/llvm/llvm-project/commit/adf7043a9fbafc35add555b8542a198c1c678cb7.diff

LOG: [AMDGPU] Only remove branches in SIInstrInfo::removeBranch

Without this change _term instructions can be removed during
critical edge splitting.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D111126

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    llvm/test/CodeGen/AMDGPU/artificial-terminators.mir

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 42c3b6f65c22a..d72fbe9b1c574 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -2460,9 +2460,12 @@ unsigned SIInstrInfo::removeBranch(MachineBasicBlock &MBB,
   unsigned RemovedSize = 0;
   while (I != MBB.end()) {
     MachineBasicBlock::iterator Next = std::next(I);
-    RemovedSize += getInstSizeInBytes(*I);
-    I->eraseFromParent();
-    ++Count;
+    // Skip over artificial terminators when removing instructions.
+    if (I->isBranch() || I->isReturn()) {
+      RemovedSize += getInstSizeInBytes(*I);
+      I->eraseFromParent();
+      ++Count;
+    }
     I = Next;
   }
 

diff  --git a/llvm/test/CodeGen/AMDGPU/artificial-terminators.mir b/llvm/test/CodeGen/AMDGPU/artificial-terminators.mir
index edf0ace463e0f..d1075fa9796cd 100644
--- a/llvm/test/CodeGen/AMDGPU/artificial-terminators.mir
+++ b/llvm/test/CodeGen/AMDGPU/artificial-terminators.mir
@@ -38,6 +38,7 @@ body: |
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_32 = V_CMP_LT_I32_e64 [[V_ADD_U32_e64_3]], [[S_MOV_B32_1]], implicit $exec
   ; CHECK-NEXT:   [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 $exec_lo, [[V_CMP_LT_I32_e64_]], implicit-def $scc
+  ; CHECK-NEXT:   $exec_lo = S_MOV_B32_term [[S_XOR_B32_]]
   ; CHECK-NEXT:   S_CBRANCH_EXECNZ %bb.2, implicit $exec
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.5: