[llvm] f38cbd7 - [NFC][X86][LV] Add costmodel test coverage for interleaved i32/f32 load/store stride=4
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 4 07:33:03 PDT 2021
Author: Roman Lebedev
Date: 2021-10-04T17:31:57+03:00
New Revision: f38cbd785985be73be0d0129781d929e55abffb1
URL: https://github.com/llvm/llvm-project/commit/f38cbd785985be73be0d0129781d929e55abffb1
DIFF: https://github.com/llvm/llvm-project/commit/f38cbd785985be73be0d0129781d929e55abffb1.diff
LOG: [NFC][X86][LV] Add costmodel test coverage for interleaved i32/f32 load/store stride=4
Added:
llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
new file mode 100644
index 000000000000..93f70564ff22
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
@@ -0,0 +1,78 @@
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+sse2 --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX1
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx2 --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx512bw,+avx512vl --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX512
+; REQUIRES: asserts
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at A = global [1024 x float] zeroinitializer, align 128
+ at B = global [1024 x i8] zeroinitializer, align 128
+
+; CHECK: LV: Checking a loop in "test"
+;
+; SSE2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4
+; SSE2: LV: Found an estimated cost of 12 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
+; SSE2: LV: Found an estimated cost of 28 for VF 4 For instruction: %v0 = load float, float* %in0, align 4
+; SSE2: LV: Found an estimated cost of 56 for VF 8 For instruction: %v0 = load float, float* %in0, align 4
+;
+; AVX1: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4
+; AVX1: LV: Found an estimated cost of 15 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
+; AVX1: LV: Found an estimated cost of 34 for VF 4 For instruction: %v0 = load float, float* %in0, align 4
+; AVX1: LV: Found an estimated cost of 76 for VF 8 For instruction: %v0 = load float, float* %in0, align 4
+; AVX1: LV: Found an estimated cost of 152 for VF 16 For instruction: %v0 = load float, float* %in0, align 4
+;
+; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 15 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 34 for VF 4 For instruction: %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 76 for VF 8 For instruction: %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 152 for VF 16 For instruction: %v0 = load float, float* %in0, align 4
+;
+; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4
+; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
+; AVX512: LV: Found an estimated cost of 5 for VF 4 For instruction: %v0 = load float, float* %in0, align 4
+; AVX512: LV: Found an estimated cost of 8 for VF 8 For instruction: %v0 = load float, float* %in0, align 4
+; AVX512: LV: Found an estimated cost of 22 for VF 16 For instruction: %v0 = load float, float* %in0, align 4
+; AVX512: LV: Found an estimated cost of 92 for VF 32 For instruction: %v0 = load float, float* %in0, align 4
+;
+; CHECK-NOT: LV: Found an estimated cost of {{[0-9]+}} for VF {{[0-9]+}} For instruction: %v0 = load float, float* %in0, align 4
+
+define void @test() {
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+
+ %iv.0 = add nuw nsw i64 %iv, 0
+ %iv.1 = add nuw nsw i64 %iv, 1
+ %iv.2 = add nuw nsw i64 %iv, 2
+ %iv.3 = add nuw nsw i64 %iv, 3
+
+ %in0 = getelementptr inbounds [1024 x float], [1024 x float]* @A, i64 0, i64 %iv.0
+ %in1 = getelementptr inbounds [1024 x float], [1024 x float]* @A, i64 0, i64 %iv.1
+ %in2 = getelementptr inbounds [1024 x float], [1024 x float]* @A, i64 0, i64 %iv.2
+ %in3 = getelementptr inbounds [1024 x float], [1024 x float]* @A, i64 0, i64 %iv.3
+
+ %v0 = load float, float* %in0
+ %v1 = load float, float* %in1
+ %v2 = load float, float* %in2
+ %v3 = load float, float* %in3
+
+ %reduce.add.0 = fadd float %v0, %v1
+ %reduce.add.1 = fadd float %reduce.add.0, %v2
+ %reduce.add.2 = fadd float %reduce.add.1, %v3
+
+ %reduce.add.2.narrow = fptoui float %reduce.add.2 to i8
+
+ %out = getelementptr inbounds [1024 x i8], [1024 x i8]* @B, i64 0, i64 %iv.0
+ store i8 %reduce.add.2.narrow, i8* %out
+
+ %iv.next = add nuw nsw i64 %iv.0, 4
+ %cmp = icmp ult i64 %iv.next, 1024
+ br i1 %cmp, label %for.body, label %for.cond.cleanup
+
+for.cond.cleanup:
+ ret void
+}
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
new file mode 100644
index 000000000000..9aaafab2f2fd
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
@@ -0,0 +1,78 @@
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+sse2 --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX1
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx2 --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx512bw,+avx512vl --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX512
+; REQUIRES: asserts
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at A = global [1024 x i32] zeroinitializer, align 128
+ at B = global [1024 x i8] zeroinitializer, align 128
+
+; CHECK: LV: Checking a loop in "test"
+;
+; SSE2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4
+; SSE2: LV: Found an estimated cost of 28 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
+; SSE2: LV: Found an estimated cost of 60 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4
+; SSE2: LV: Found an estimated cost of 120 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4
+;
+; AVX1: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX1: LV: Found an estimated cost of 21 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX1: LV: Found an estimated cost of 42 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX1: LV: Found an estimated cost of 92 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX1: LV: Found an estimated cost of 184 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4
+;
+; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 21 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 42 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 92 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 184 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4
+;
+; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX512: LV: Found an estimated cost of 5 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX512: LV: Found an estimated cost of 8 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX512: LV: Found an estimated cost of 22 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4
+; AVX512: LV: Found an estimated cost of 92 for VF 32 For instruction: %v0 = load i32, i32* %in0, align 4
+;
+; CHECK-NOT: LV: Found an estimated cost of {{[0-9]+}} for VF {{[0-9]+}} For instruction: %v0 = load i32, i32* %in0, align 4
+
+define void @test() {
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+
+ %iv.0 = add nuw nsw i64 %iv, 0
+ %iv.1 = add nuw nsw i64 %iv, 1
+ %iv.2 = add nuw nsw i64 %iv, 2
+ %iv.3 = add nuw nsw i64 %iv, 3
+
+ %in0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @A, i64 0, i64 %iv.0
+ %in1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @A, i64 0, i64 %iv.1
+ %in2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @A, i64 0, i64 %iv.2
+ %in3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @A, i64 0, i64 %iv.3
+
+ %v0 = load i32, i32* %in0
+ %v1 = load i32, i32* %in1
+ %v2 = load i32, i32* %in2
+ %v3 = load i32, i32* %in3
+
+ %reduce.add.0 = add i32 %v0, %v1
+ %reduce.add.1 = add i32 %reduce.add.0, %v2
+ %reduce.add.2 = add i32 %reduce.add.1, %v3
+
+ %reduce.add.2.narrow = trunc i32 %reduce.add.2 to i8
+
+ %out = getelementptr inbounds [1024 x i8], [1024 x i8]* @B, i64 0, i64 %iv.0
+ store i8 %reduce.add.2.narrow, i8* %out
+
+ %iv.next = add nuw nsw i64 %iv.0, 4
+ %cmp = icmp ult i64 %iv.next, 1024
+ br i1 %cmp, label %for.body, label %for.cond.cleanup
+
+for.cond.cleanup:
+ ret void
+}
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
new file mode 100644
index 000000000000..a8c3e273f18c
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
@@ -0,0 +1,80 @@
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+sse2 --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX1
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx2 --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx512bw,+avx512vl --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX512
+; REQUIRES: asserts
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at A = global [1024 x i8] zeroinitializer, align 128
+ at B = global [1024 x float] zeroinitializer, align 128
+
+; CHECK: LV: Checking a loop in "test"
+;
+; SSE2: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v3, float* %out3, align 4
+; SSE2: LV: Found an estimated cost of 12 for VF 2 For instruction: store float %v3, float* %out3, align 4
+; SSE2: LV: Found an estimated cost of 28 for VF 4 For instruction: store float %v3, float* %out3, align 4
+; SSE2: LV: Found an estimated cost of 56 for VF 8 For instruction: store float %v3, float* %out3, align 4
+;
+; AVX1: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v3, float* %out3, align 4
+; AVX1: LV: Found an estimated cost of 13 for VF 2 For instruction: store float %v3, float* %out3, align 4
+; AVX1: LV: Found an estimated cost of 30 for VF 4 For instruction: store float %v3, float* %out3, align 4
+; AVX1: LV: Found an estimated cost of 76 for VF 8 For instruction: store float %v3, float* %out3, align 4
+; AVX1: LV: Found an estimated cost of 152 for VF 16 For instruction: store float %v3, float* %out3, align 4
+;
+; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v3, float* %out3, align 4
+; AVX2: LV: Found an estimated cost of 13 for VF 2 For instruction: store float %v3, float* %out3, align 4
+; AVX2: LV: Found an estimated cost of 30 for VF 4 For instruction: store float %v3, float* %out3, align 4
+; AVX2: LV: Found an estimated cost of 76 for VF 8 For instruction: store float %v3, float* %out3, align 4
+; AVX2: LV: Found an estimated cost of 152 for VF 16 For instruction: store float %v3, float* %out3, align 4
+;
+; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v3, float* %out3, align 4
+; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: store float %v3, float* %out3, align 4
+; AVX512: LV: Found an estimated cost of 5 for VF 4 For instruction: store float %v3, float* %out3, align 4
+; AVX512: LV: Found an estimated cost of 11 for VF 8 For instruction: store float %v3, float* %out3, align 4
+; AVX512: LV: Found an estimated cost of 22 for VF 16 For instruction: store float %v3, float* %out3, align 4
+; AVX512: LV: Found an estimated cost of 44 for VF 32 For instruction: store float %v3, float* %out3, align 4
+; AVX512: LV: Found an estimated cost of 88 for VF 64 For instruction: store float %v3, float* %out3, align 4
+;
+; CHECK-NOT: LV: Found an estimated cost of {{[0-9]+}} for VF {{[0-9]+}} For instruction: store float %v3, float* %out3, align 4
+
+define void @test() {
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+
+ %iv.0 = add nuw nsw i64 %iv, 0
+ %iv.1 = add nuw nsw i64 %iv, 1
+ %iv.2 = add nuw nsw i64 %iv, 2
+ %iv.3 = add nuw nsw i64 %iv, 3
+
+ %in = getelementptr inbounds [1024 x i8], [1024 x i8]* @A, i64 0, i64 %iv.0
+ %v.narrow = load i8, i8* %in
+
+ %v = uitofp i8 %v.narrow to float
+
+ %v0 = fadd float %v, 0.0
+ %v1 = fadd float %v, 1.0
+ %v2 = fadd float %v, 2.0
+ %v3 = fadd float %v, 3.0
+
+ %out0 = getelementptr inbounds [1024 x float], [1024 x float]* @B, i64 0, i64 %iv.0
+ %out1 = getelementptr inbounds [1024 x float], [1024 x float]* @B, i64 0, i64 %iv.1
+ %out2 = getelementptr inbounds [1024 x float], [1024 x float]* @B, i64 0, i64 %iv.2
+ %out3 = getelementptr inbounds [1024 x float], [1024 x float]* @B, i64 0, i64 %iv.3
+
+ store float %v0, float* %out0
+ store float %v1, float* %out1
+ store float %v2, float* %out2
+ store float %v3, float* %out3
+
+ %iv.next = add nuw nsw i64 %iv.0, 4
+ %cmp = icmp ult i64 %iv.next, 1024
+ br i1 %cmp, label %for.body, label %for.cond.cleanup
+
+for.cond.cleanup:
+ ret void
+}
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
new file mode 100644
index 000000000000..cb3a704590b5
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
@@ -0,0 +1,80 @@
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+sse2 --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX1
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx2 --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: opt -loop-vectorize -vectorizer-maximize-bandwidth -S -mattr=+avx512bw,+avx512vl --debug-only=loop-vectorize < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,AVX512
+; REQUIRES: asserts
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+ at A = global [1024 x i8] zeroinitializer, align 128
+ at B = global [1024 x i32] zeroinitializer, align 128
+
+; CHECK: LV: Checking a loop in "test"
+;
+; SSE2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v3, i32* %out3, align 4
+; SSE2: LV: Found an estimated cost of 28 for VF 2 For instruction: store i32 %v3, i32* %out3, align 4
+; SSE2: LV: Found an estimated cost of 60 for VF 4 For instruction: store i32 %v3, i32* %out3, align 4
+; SSE2: LV: Found an estimated cost of 120 for VF 8 For instruction: store i32 %v3, i32* %out3, align 4
+;
+; AVX1: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX1: LV: Found an estimated cost of 19 for VF 2 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX1: LV: Found an estimated cost of 38 for VF 4 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX1: LV: Found an estimated cost of 92 for VF 8 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX1: LV: Found an estimated cost of 184 for VF 16 For instruction: store i32 %v3, i32* %out3, align 4
+;
+; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX2: LV: Found an estimated cost of 19 for VF 2 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX2: LV: Found an estimated cost of 38 for VF 4 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX2: LV: Found an estimated cost of 92 for VF 8 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX2: LV: Found an estimated cost of 184 for VF 16 For instruction: store i32 %v3, i32* %out3, align 4
+;
+; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX512: LV: Found an estimated cost of 5 for VF 4 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX512: LV: Found an estimated cost of 11 for VF 8 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX512: LV: Found an estimated cost of 22 for VF 16 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX512: LV: Found an estimated cost of 44 for VF 32 For instruction: store i32 %v3, i32* %out3, align 4
+; AVX512: LV: Found an estimated cost of 88 for VF 64 For instruction: store i32 %v3, i32* %out3, align 4
+;
+; CHECK-NOT: LV: Found an estimated cost of {{[0-9]+}} for VF {{[0-9]+}} For instruction: store i32 %v3, i32* %out3, align 4
+
+define void @test() {
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+
+ %iv.0 = add nuw nsw i64 %iv, 0
+ %iv.1 = add nuw nsw i64 %iv, 1
+ %iv.2 = add nuw nsw i64 %iv, 2
+ %iv.3 = add nuw nsw i64 %iv, 3
+
+ %in = getelementptr inbounds [1024 x i8], [1024 x i8]* @A, i64 0, i64 %iv.0
+ %v.narrow = load i8, i8* %in
+
+ %v = zext i8 %v.narrow to i32
+
+ %v0 = add i32 %v, 0
+ %v1 = add i32 %v, 1
+ %v2 = add i32 %v, 2
+ %v3 = add i32 %v, 3
+
+ %out0 = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 %iv.0
+ %out1 = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 %iv.1
+ %out2 = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 %iv.2
+ %out3 = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 %iv.3
+
+ store i32 %v0, i32* %out0
+ store i32 %v1, i32* %out1
+ store i32 %v2, i32* %out2
+ store i32 %v3, i32* %out3
+
+ %iv.next = add nuw nsw i64 %iv.0, 4
+ %cmp = icmp ult i64 %iv.next, 1024
+ br i1 %cmp, label %for.body, label %for.cond.cleanup
+
+for.cond.cleanup:
+ ret void
+}
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