[PATCH] D111031: [WIP][X86][Costmodel] Load/store i64/f64 Stride=3 VF=16 interleaving costs

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

We are quite limited - even adding all xmm0 to the llvm-mca asm capture (~{xmm0} etc.) has very little effect - short of hand coding something, I think what you have here is at least a realistic magnitude vaue.

I'm happy to accept this if you want.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D111031