[PATCH] D110231: [AMDGPU] Add constrained shift pattern matches.

[Abinav Puthan Purayil via Phabricator via llvm-commits]

abinavpp added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2529
+
+// FIXME: 64 bit pattern match is not generated.
+foreach i = [16, 32, 64] in {
----------------
Why can't I see the OPC_MorphNodeTo1 in the MatcherTable array of the generated
GenDAGISel.inc for the 64 bit patterns?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110231/new/

https://reviews.llvm.org/D110231