[llvm] d48f6df - [RISCV] Create the correct mask type when lowering EXTRACT_VECTOR_ELT
Fraser Cormack via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 27 01:54:00 PDT 2021
Author: Fraser Cormack
Date: 2021-09-27T09:43:40+01:00
New Revision: d48f6df1f8ef84d97856697a6366f440f0d9bb54
URL: https://github.com/llvm/llvm-project/commit/d48f6df1f8ef84d97856697a6366f440f0d9bb54
DIFF: https://github.com/llvm/llvm-project/commit/d48f6df1f8ef84d97856697a6366f440f0d9bb54.diff
LOG: [RISCV] Create the correct mask type when lowering EXTRACT_VECTOR_ELT
This particular case was creating a `VMSET_VL` using the old
fixed-length type in order to pass a mask to other custom nodes
operating on the scalable container type. This kind of thing wasn't
caught for us; I only noticed when experimenting with odd-length
vectors, where it was trying to generate an invalid `v3i1` MVT.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D110420
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 646346d4acfa..ff8d2d948c5c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -5791,7 +5791,7 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,
MVT XLenVT = Subtarget.getXLenVT();
// Use a VL of 1 to avoid processing more elements than we need.
- MVT MaskVT = MVT::getVectorVT(MVT::i1, VecVT.getVectorElementCount());
+ MVT MaskVT = MVT::getVectorVT(MVT::i1, ContainerVT.getVectorElementCount());
SDValue VL = DAG.getConstant(1, DL, XLenVT);
SDValue Mask = DAG.getNode(RISCVISD::VMSET_VL, DL, MaskVT, VL);
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