[PATCH] D109300: [AMDGPU] Make vector superclasses allocatable

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas added a comment.

In D109300#3018937 <https://reviews.llvm.org/D109300#3018937>, @rampitec wrote:

> Thanks. FoldImmediate() and Global ISel seems to be last issue to me.

The MAIInst uses AVSrc_32 for src0 & src1 operands.
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/VOP3PInstructions.td#L378

I am not sure we can do something to prevent GIsel from choosing AV classes here.
Yes, the w/a in FoldImmediate was done to adjust the register class as per the opcode we choose.


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