[PATCH] D110305: [TableGen] Allow targets to entirely ignore Psets for registers

Christudasan Devadasan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 23 20:09:39 PDT 2021


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG40ddde5d1fa7: [TableGen] Allow targets to entirely ignore Psets for registers (authored by cdevadas).

Changed prior to commit:
  https://reviews.llvm.org/D110305?vs=374545&id=374716#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110305/new/

https://reviews.llvm.org/D110305

Files:
  llvm/test/TableGen/bare-minimum-psets.td
  llvm/test/TableGen/empty-psets.td
  llvm/utils/TableGen/CodeGenRegisters.cpp

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