[PATCH] D110231: [AMDGPU] Add constrained shift pattern matches.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

Also should test globalisel



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Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2520
+def : ConstrainedI32ShiftPat<sra, V_ASHRREV_I32_e64>;
 
 // Avoid pointlessly materializing a constant in VGPR.
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Should also handle scalar cases. Also consider handling 32-bit and 16-bit shifts


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Comment at: llvm/test/CodeGen/AMDGPU/shift-opts.ll:13-14
+; CHECK-NEXT:    s_setpc_b64 s[30:31]
+  %and = and i32 %b, 31
+  %shl = shl i32 %a, %and
+  %lshr = lshr i32 %a, %and
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I would prefer to split each case into a separate function. Should also test the scalar cases


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D110231/new/

https://reviews.llvm.org/D110231