[PATCH] D109953: [X86][FP16] Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A)

[LiuChen via Phabricator via llvm-commits]

LiuChen3 added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:47533
+auto AllowContract = [&DAG](const SDNodeFlags &Flags) {
+  return DAG.getTarget().Options.AllowFPOpFusion == FPOpFusion::Fast ||
+         (Flags.hasNoNaNs() && Flags.hasNoInfs() && Flags.hasNoSignedZeros() &&
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Maybe we can just check hasNoSignedZeros() and hasAllowContract() as pengfei said?


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Comment at: llvm/test/CodeGen/X86/avx512fp16-combine-vfmac-fadd.ll:196
+  %1 = bitcast <32 x half> %b to <16 x float>
+  %2 = tail call <16 x float> @llvm.x86.avx512fp16.mask.vfcmadd.cph.512(<16 x float> <float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000, float 0xB790000000000000>, <16 x float> %0, <16 x float> %1, i16 -1, i32 4)
+  %3 = bitcast <16 x float> %2 to <32 x half>
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Should we do this combine standalone?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D109953/new/

https://reviews.llvm.org/D109953