[PATCH] D107658: [RISCV] Teach isel to select ADDW/SUBW/MULW/SLLIW when only the lower 32-bits are used.

[Zixuan Wu via Phabricator via llvm-commits]

zixuan-wu added a comment.





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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1259
+// if only the lower 32 bits of their result is used.
+class overflowingbinopw<SDPatternOperator operator>
+    : PatFrag<(ops node:$lhs, node:$rhs),
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I am wondering could it be applied to more complicated condition with 3 operands or 1 operand? For example, mulaw, or unary operator.


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