[PATCH] D109963: [AArch64] Split bitmask immediate of bitwise AND operation

JinGu Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 21 05:31:13 PDT 2021


jaykang10 added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/arm64-ccmp.ll:374
+; CHECK-NEXT:    and x8, x8, #0x3f
+; CHECK-NEXT:    and x8, x8, #0xffffffffffffffdf
 ; CHECK-NEXT:    ccmp x8, #0, #4, ls
----------------
jaykang10 wrote:
> efriedma wrote:
> > This looks wrong?
> um... I think it is correct.
> ```
> mov x9, #31
> movk x9, #48, lsl #32
> ==>
> (48 << 32) | 31 = 31
> ```
> ```
> and x8, x8, #0x3f
> and x8, x8, #0xffffffffffffffdf
> ==>
> 0xffffffffffffffdf & 0x3f = 31
> ```
Sorry, I made a mistake. x register is 64 bit... Let me fix it.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109963/new/

https://reviews.llvm.org/D109963



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