[PATCH] D109963: [AArch64] Split bitmask immediate of bitwise AND operation

[JinGu Kang via Phabricator via llvm-commits]

jaykang10 added a comment.

In D109963#3011413 <https://reviews.llvm.org/D109963#3011413>, @dmgreen wrote:

> Nice job making the tablegen patterns work.
>
> Is it possible to combine more of the 32 and 64bit logic? They share quite a bit in common. A few more tests sound useful too, for various edge cases.

Yep, let me update patch with it.



================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:1962
+
+  if (isSingleInstImm64(UImm64))
+    return false;
----------------
dmgreen wrote:
> This can probably use AArch64_IMM::expandMOVImm? And Count the number of Instructions it produces. A similar "how many instructions will this immediate produce" was needed in https://reviews.llvm.org/D108871
Yep, let me update code with it.


================
Comment at: llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll:8
+; CHECK-NEXT:    and w8, w0, #0x3ffc00
+; CHECK-NEXT:    and w8, w8, #0xffe007ff
+; CHECK-NEXT:    cmp w8, #1024
----------------
efriedma wrote:
> Do we want to do something different if the operation is in a loop, so the immediate could be hoisted?
um... I do not think the split bitmask immediate affects MachineLICM pass to detect the invariant code.

Let me add a test case with loop. 


================
Comment at: llvm/test/CodeGen/AArch64/arm64-ccmp.ll:374
+; CHECK-NEXT:    and x8, x8, #0x3f
+; CHECK-NEXT:    and x8, x8, #0xffffffffffffffdf
 ; CHECK-NEXT:    ccmp x8, #0, #4, ls
----------------
efriedma wrote:
> This looks wrong?
um... I think it is correct.
```
mov x9, #31
movk x9, #48, lsl #32
==>
(48 << 32) | 31 = 31
```
```
and x8, x8, #0x3f
and x8, x8, #0xffffffffffffffdf
==>
0xffffffffffffffdf & 0x3f = 31
```


================
Comment at: llvm/test/CodeGen/AArch64/bitfield-insert.ll:13
+; CHECK-NEXT:    and w8, w0, #0xff
+; CHECK-NEXT:    and w8, w8, #0xffffff87
 ; CHECK-NEXT:    bfi w8, w1, #3, #4
----------------
efriedma wrote:
> This isn't an improvement.
Let me update code to avoid it.


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  https://reviews.llvm.org/D109963/new/

https://reviews.llvm.org/D109963