[llvm] 7b68c07 - pre-commit test for D109767
Alex Richardson via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 20 04:56:24 PDT 2021
Author: Alex Richardson
Date: 2021-09-20T12:55:56+01:00
New Revision: 7b68c0725d89ac9bd48b9b6a51d9cd0bc7146829
URL: https://github.com/llvm/llvm-project/commit/7b68c0725d89ac9bd48b9b6a51d9cd0bc7146829
DIFF: https://github.com/llvm/llvm-project/commit/7b68c0725d89ac9bd48b9b6a51d9cd0bc7146829.diff
LOG: pre-commit test for D109767
Differential Revision: https://reviews.llvm.org/D109765
Added:
llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir
llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
llvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg
llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test
Modified:
Removed:
################################################################################
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir
new file mode 100644
index 000000000000..93cd667d2739
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir
@@ -0,0 +1,48 @@
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK
+
+--- |
+
+ define i32 @test(i32 %a) {
+ entry:
+ %cmp = trunc i32 %a to i1
+ br i1 %cmp, label %true, label %false
+
+ true: ; preds = %entry
+ ret i32 0
+
+ false: ; preds = %entry
+ ret i32 1
+ }
+
+...
+---
+name: test
+alignment: 16
+legalized: true
+regBankSelected: true
+registers:
+ - { id: 0, class: gpr, preferred-register: '' }
+ - { id: 1, class: gpr, preferred-register: '' }
+ - { id: 2, class: gpr, preferred-register: '' }
+ - { id: 3, class: gpr, preferred-register: '' }
+body: |
+ bb.1.entry:
+ successors: %bb.2(0x40000000), %bb.3(0x40000000)
+ liveins: $edi
+
+ %0(s32) = COPY $edi
+ %2(s32) = G_CONSTANT i32 0
+ %3(s32) = G_CONSTANT i32 1
+ %1(s1) = G_TRUNC %0(s32)
+ G_BRCOND %1(s1), %bb.2
+ G_BR %bb.3
+
+ bb.2.true:
+ $eax = COPY %2(s32)
+ RET 0, implicit $eax
+
+ bb.3.false:
+ $eax = COPY %3(s32)
+ RET 0, implicit $eax
+
+...
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
new file mode 100644
index 000000000000..61798e2fbbeb
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected
@@ -0,0 +1,65 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK
+
+--- |
+
+ define i32 @test(i32 %a) {
+ entry:
+ %cmp = trunc i32 %a to i1
+ br i1 %cmp, label %true, label %false
+
+ true: ; preds = %entry
+ ret i32 0
+
+ false: ; preds = %entry
+ ret i32 1
+ }
+
+...
+---
+name: test
+alignment: 16
+legalized: true
+regBankSelected: true
+registers:
+ - { id: 0, class: gpr, preferred-register: '' }
+ - { id: 1, class: gpr, preferred-register: '' }
+ - { id: 2, class: gpr, preferred-register: '' }
+ - { id: 3, class: gpr, preferred-register: '' }
+body: |
+ ; CHECK-LABEL: name: test
+ ; CHECK: bb.0.entry:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
+ ; CHECK: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 1
+ ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; CHECK: TEST8ri [[COPY1]], 1, implicit-def $eflags
+ ; CHECK: JCC_1 %bb.1, 5, implicit $eflags
+ ; CHECK: JMP_1 %bb.2
+ ; CHECK: bb.1.true:
+ ; CHECK: $eax = COPY [[MOV32r0_]]
+ ; CHECK: RET 0, implicit $eax
+ ; CHECK: bb.2.false:
+ ; CHECK: $eax = COPY [[MOV32ri]]
+ ; CHECK: RET 0, implicit $eax
+ bb.1.entry:
+ successors: %bb.2(0x40000000), %bb.3(0x40000000)
+ liveins: $edi
+
+ %0(s32) = COPY $edi
+ %2(s32) = G_CONSTANT i32 0
+ %3(s32) = G_CONSTANT i32 1
+ %1(s1) = G_TRUNC %0(s32)
+ G_BRCOND %1(s1), %bb.2
+ G_BR %bb.3
+
+ bb.2.true:
+ $eax = COPY %2(s32)
+ RET 0, implicit $eax
+
+ bb.3.false:
+ $eax = COPY %3(s32)
+ RET 0, implicit $eax
+
+...
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg
new file mode 100644
index 000000000000..60eb2b6ae521
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg
@@ -0,0 +1,3 @@
+# These tests require llc.
+if 'llc-binary' not in config.available_features:
+ config.unsupported = True
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test
new file mode 100644
index 000000000000..3bce3f1d45ef
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test
@@ -0,0 +1,5 @@
+# REQUIRES: x86-registered-target
+## Check that update_mir_test_checks uses CHECK-NEXT directories
+
+# RUN: cp -f %S/Inputs/x86-condbr.mir %t.mir && %update_mir_test_checks %t.mir
+# RUN:
diff -u %S/Inputs/x86-condbr.mir.expected %t.mir
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