[PATCH] D109963: [AArch64] Split bitmask immediate of bitwise AND operation

[JinGu Kang via Phabricator via llvm-commits]

jaykang10 created this revision.
jaykang10 added reviewers: t.p.northover, dmgreen, eli.friedman.
Herald added subscribers: hiraditya, kristof.beyls.
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This patch tries below transformation.

  MOVi32imm + ANDWrr
  ==>
  ANDWri + ANDWri

The MOVi32imm pseudo instruction could be expanded to multiple mov instructions later. Let's try to split the constant operand of MOVi32imm into two bitmask immediates. It makes only two AND instructions intead of multiple `mov + and` instructions.


https://reviews.llvm.org/D109963

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
  llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-innerouter.ll

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