[PATCH] D109323: [AArch64] Improve adrp schedule modelling on the Cortex-A55

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/a55-fuse-address.mir:2
 # NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 # RUN: llc -o - %s -mtriple=aarch64 -verify-machineinstrs | FileCheck %s
 --- |
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Should this be running a pass? -run-pass=machine-scheduler? And be updated using update_mir_test_checks?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109323/new/

https://reviews.llvm.org/D109323