[PATCH] D108602: [RISCV] Initial support .insn directive for the assembler.

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.td:568
+                                (sequence "V%u", 0, 31))> {
+  let RegInfos = XLenRI;
+}
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craig.topper wrote:
> jrtc27 wrote:
> > Missed this one last time... but same comment, probably shouldn't be set
> Removing that caused tablegen to crash. Turns out we either need a valid VT where untyped is or we need a non-zero "let Size =".
Makes sense. This is probably about as good as we can get then without adding some notion of a pseudo register class to tablegen.


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  https://reviews.llvm.org/D108602/new/

https://reviews.llvm.org/D108602