[PATCH] D109422: [AArch64][SVE] NFC: Use stepvector directly in index multiclasses

Cullen Rhodes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 8 03:03:13 PDT 2021


c-rhodes added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1480-1483
-  defm INDEX_RR : sve_int_index_rr<"index", step_vector, step_vector_oneuse, AArch64mul_p_oneuse>;
-  defm INDEX_IR : sve_int_index_ir<"index", step_vector, step_vector_oneuse, AArch64mul_p, AArch64mul_p_oneuse>;
-  defm INDEX_RI : sve_int_index_ri<"index", step_vector, step_vector_oneuse>;
-  defm INDEX_II : sve_int_index_ii<"index", step_vector, step_vector_oneuse>;
----------------
paulwalker-arm wrote:
> If you're going to hardwire the `step_vector` usage, which I'm fine with by the way, you may as well also hardwire the `mul` operators as well.
> If you're going to hardwire the `step_vector` usage, which I'm fine with by the way, you may as well also hardwire the `mul` operators as well.

that will requires moving `AArch64mul_p`/`AArch64mul_p_oneuse`/`SDT_AArch64Arith` to `SVEInstrFormats.td`, separating it from the other predicated op nodes. It seems more ideal to define these things in `SVEInstrFormats.td` since they can be used in `AArch64SVEInstrInfo.td` as well but it seems outside the scope of this patch.


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  https://reviews.llvm.org/D109422/new/

https://reviews.llvm.org/D109422



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