[PATCH] D109314: [AArch64] Implement extract_subvector for predicates.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 8 00:18:09 PDT 2021


sdesmalen added a comment.

Thanks for the review @CarolineConcatto!

In D109314#2986550 <https://reviews.llvm.org/D109314#2986550>, @CarolineConcatto wrote:

> It is nice to see that it also works for types like:
>  <vscale x 2 x i1> @llvm.experimental.vector.extract.nxv2i1.nxv6i1(<vscale x 6 x i1>, i64)
>  <vscale x 2 x i1> @llvm.experimental.vector.extract.nxv2i1.nxv12i1(<vscale x 12 x i1>, i64)
> It would be too much if you add a test for these types/strides too?

While these tests are useful, I don't think they should be part of this patch because this patch only implements the legal case.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109314/new/

https://reviews.llvm.org/D109314



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